Modern electronic devices, such as microprocessors, often include a complex matrix of logic gates and other circuitry arranged to perform particular tasks and functions. These logic gates are often interconnected in two parallel arrangements, one arrangement for operation, and another arrangement for testing the functionality of the circuit. Linking a plurality of latches together into a “scan chain” is one popular method of arranging logic units for functional/operational testing. Grouping components into groups of “stumps” is another popular method of arranging logic units for functional/operational testing. One skilled in the art will appreciate that there are a wide variety of ways to arrange circuit components to facilitate testing. As used herein, “stump” or “stumps” refers generally to an arrangement of logic units or other circuits coupled together for testing.
One popular approach to testing circuits is to apply a number of test patterns to a device under test (DUT), as a whole or divided into stumps, comparing the resultant output with a known good output for that test pattern. One skilled in the art will appreciate that there are a wide variety of systems and methods for generating test patterns that provide inputs to the DUT that help identify DUT faults or malfunctions.
One popular mechanism for generating and applying test patterns to a DUT is the logic built-in self-test (LBIST) approach. Generally, in LBIST testing, a user creates an LBIST test pattern that causes the DUT to run N number of internally-generated pseudo-random LBIST patterns on itself, compressing the results into multiple input shift registers (MISRs), described in more detail below. As used herein, an “LBIST pattern” is one of a plurality of test patterns generated by the DUT in response to an “LBIST test pattern.”
As the number and complexity of circuit components and circuits in modern electronic devices has grown, so have the number of LBIST patterns required to analyze a chip, and the time required to set up, apply, and analyze the MISR outputs the LBIST patterns generate. For example, it is not unusual for an LBIST test run to apply on the order of 2 million or more LBIST patterns. A large number of LBIST patterns increases the time required to identify “failing patterns,” that is, LBIST patterns that cause MISR outputs that do not match a known output, which indicates that the DUT does not function in the manner expected for the associated LBIST test pattern.
In conventional LBIST systems, the DUT includes a pseudo-random pattern generator (PRPG) that generates the LBIST patterns based on the “seed” LBIST test pattern. As such, most conventional LBIST patterns are arranged in a particular order (the deterministic PRPG order), and typical systems apply the LBIST patterns to the DUT in that order. In particular, for each LBIST pattern, typical systems clock in the current LBIST pattern to the DUT, perform a functional clock cycle, and clock out the resultant DUT state (the “output”) to the MISRs. The MISRs compress the output into a “signature.”
Because of the nature of the output capture MISRs, a DUT state output that deviates from the expected output for a given LBIST pattern, corrupts the MISR outputs (the signatures) for subsequent LBIST patterns. And the corrupted subsequent signatures look like failing LBIST patterns. Therefore, many typical conventional test systems employ a “binary search” approach to identifying failing LBIST patterns.
The binary search approach is well known to those skilled in the art and generally consists of dividing the number of applied LBIST patterns into narrower and narrower halves, until the process identifies the first failing LBIST pattern. This approach, however, requires a binary search of log2 (N) iterations to find a failing LBIST pattern, where N is the number of LBIST patterns. For example, for a DUT tested with 1M (million) LBIST patterns, where the 264,001st LBIST pattern fails, a typical test system would run the first 1M LBIST patterns, which would indicate a failure in some LBIST pattern before the one millionth LBIST pattern. The system runs the series of LBIST patterns again, this time running only the first 500 thousand LBIST patterns, which is one-half of the full run. The 500,000th LBIST pattern MISR output does not match the known output, and so the system now knows that the failing LBIST pattern is in the first half of the sequence of LBIST patterns.
The system next runs the first 250 thousand LBIST patterns, after which, the MISR output does match the expected output. The system now knows that the failing LBIST pattern is between the 250,001st and the 499,999th LBIST pattern. The system then runs the first 275,000 LBIST patterns (which fails), then the first 262,500 LBIST patterns (which passes), then the first 268,750 (which fails), and so forth, narrowing the change in search range until the system finds the failing 264,001st LBIST pattern. As described above, this standard binary search approach can identify a failing LBIST pattern in O(log2 (N)) time.
The standard binary search time is not inherently unreasonable, particularly for small numbers of LBIST patterns. However, as the number of LBIST patterns required to properly test a DUT increases, the search time for a standard binary search becomes too long to be practical, especially as compared to the decreasing time window available during the manufacturing process.
In cases where there are two (or more) faults in the DUT, causing for example, a failing LBIST pattern each “half” of the total LBIST patterns, traditional methods will find the first failing pattern before the second failing pattern. After the fault causing the first failing pattern has been addressed, subsequent testing discovers the second failing pattern.
Therefore, there is a need for a system and/or method for testing an electronic circuit for multiple faults that addresses at least some of the problems and disadvantages associated with conventional systems and methods.